DESIGN PHASE: analysis SUB ELEMENT NAME: power supply sequencing VARIABLE NAME: [HEAPS] DATE: REVISION LETTER: REVISION DATE: APPLICABILITY: all circuits ACTIVITY: Sequence power supplies and verify no over stress conditions or failures. Assumes use of Spice. OUTPUT: Verification that circuit is not damaged be abnormal power supply sequencing. ALGORITHM: [HEAPS] = engineer hours for power supply sequencing analysis 0.0* time per part for analysis and evaluation [INPUT COUNT]* number of power supplies sequence combinations [INPUT COUNT] DISCUSSION:
Original: Foutz, J., Power Supply Circuit Development Estimating Aid - An Expert System Application, IEEE Applied Power Electronics Conference Record, New Orleans, February 1-5, 1988. Revised 22 February 2001
Copyright © 2001 Jerrold Foutz
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